Electronic devices, components or modules, such as integrated circuits (IC), should function within expected operating modes. It is thus important that they do not inadvertently enter an unexpected mode of operation. However, certain voltage profiles, particularly at power-up, can cause an electronic device, component or module to enter an undesired mode of operation. In extreme cases, such operation may cause permanent damage, for instance, through excessive current flow resultant from an operation at lower voltage or through erroneous operation caused by an operation outside of a specified range.
Holding or setting the device, component or module in a reset mode can deter improper operation. One conventional approach to this issue is the use of a power-on-reset (POR) circuit to provide the reset functions. POR circuits are common components in many modern electronic devices or systems.
As an alternative, external components performing a supervisory function (e.g., supervisory components) have been proposed to monitor system condition(s) and provide reset signaling where at least one insufficient condition is present, for instance when low voltage conditions occur.
Normally, reset signaling is applied separately by means of reset wires for each device, component or module. This approach leads to drawbacks such as high pin count and limited topology. Typically, all reset wires would be connected to the main processor of a concerned device or system, which may become a problem in the case where reset signals have to cross a hinge.
In classical networks, e.g., TCP/IP (Transmit Control Protocol/Internet Protocol) based networks, a special protocol like SNMP (Simple Network Management Protocol) is used to reset remote devices. Such an approach always involves at least the network layer defined in the OSI (Open Systems Interconnection) model to be able to route the remote reset command to the target. This however leads to the drawback that any failures in higher OSI protocol layers (e.g., data link layer (Layer 2), network layer (Layer 3), transport layer (Layer 4)) or a head of line blocking (which can happen locally to a certain layer or throughout the whole layer stack) will prevent the reset message from reaching its destination, which also reduces reliability.